1. Field of Invention
The present invention relates to a method of manufacturing an integrated circuit. More particularly, the present invention relates to a method of fabricating a semiconductor device.
2. Description of Related Art
At present, photolithography is a core technique that determines the integrated circuit process integration. Photolithographic steps determine the definition of patterns for all the thin layers relating to the structure of semiconductor devices. Thus, photolithography is a determining key factor in the further of minimization of semiconductor devices.
For example, metal oxide semiconductor (MOS) is widely applicable to the process of very large scale integration (VLSI) circuits at the present. First, the process forms an isolating structure for the devices in the substrate to prevent carriers from passing through the substrate and moving among the adjacent devices. Then an oxide layer and a conducting layer are formed on the substrate, and a layer of photoresist is formed to cover the conducting layer with conventional photolithographic patterning. The pattern on the mask is shifted to a photoresist in exposing and patterning steps. Next, an etching process is performed to define patterns of the oxide layer and the conductive layer with a photoresist serving as an etching mask. This enables the oxide layer and the conducting layer that remain to form a gate oxide layer and a gate layer in the active area defined by the isolating structure. After that, dopants are implanted into in the substrate to form a source/drain region, with the gate layer serving as a mask.
In the above method, the dimension of the gate is determined by the photoresist after exposing and patterning, while 248 nm deep ultra-violet ray is used as the exposing light source for performing a 0.25 .mu.m process in the industry today. If a process is to be performed below 0.18 mm, a stepper is required to enable further minimization of the device, such as an improved KrF 248 nm scanning stepper with improved lens quality, an advanced mask and wafer platform technique, and a high numerical aperture. But the wavelength is physically limited while the mask difficult to manufacture. Moreover, the improvement via a photolithographic system to meet the demand of the photolithographic process of below 0.18 mm also increases the cost of the process.